Introduction to Worst Case Circuit Analysis
Learn about worst case analysis with this introductory presentation from AEi Systems.
  • What is WCCA
  • Why and When to Perform Worst Case Analysis
  • Why Stress Analysis Alone Isn’t Sufficient for Validation and Verification
  • Who should perform the analysis and Why Your In-House Resources May Not Be Up to the Task
  • WCCA Successes - Good (and Bad)
  • WCCA Today Under the New Aerospace TOR Guidelines
  • Cost and Schedule Savers and Drivers
  • Improving Your WCCA
  • Future Challenges
New Software and Technology Improves AEi Systems’ WCCA Capabilities

We’ve Been Busy

AEi Systems has been improving analysis and test capabilities and making our services more efficient and cost effective. See why others are taking advantage of our technology, expertise, and experience to get analysis done faster and to troubleshoot their toughest circuit problems.

New Analysis Techniques - Improve Speed and Efficiency

  • Automated Stress Analysis - We have automated many of the tedious and time consuming tasks associated with stress analysis - BOM Read-in, Ratings and Deratings Look-up (with support for EEE-Inst-002, RIAC, TOR, NAVSOP, LMCO Command Media, 1547 and others), MathCAD integration, Stress sheet compilation and Hyperlynx/PCB layout based performance assessment - The result, stress assessments can now be performed much more quickly and accurately than ever before.
  • Automated Digital Circuit Analysis - We have automated Signal Integrity, Crosstalk, and Logic Compatibility analysis, combining the power of SPICE and the accuracy of Hyperlynx, http://www.aeng.com/signal.htm. The results are truly amazing. Our custom software finds and fixes design issues, even ones that are not found by testing. And we do it MUCH faster and more complete than in-house resources that use manual methods.
  • Automated Sensitivity Analysis - AEi Systems has developed software to quickly turn circuit equations into documented Sensitivity Analysis Results. This valuable analysis lets designers quickly see what parameters are driving the results. Our proprietary software helps AEi Systems get WCCA done more quickly than in-house resources.
New Models for RTAX FPGAs - We have been working in conjunction with Microsemi to test the SSO, PDN, and Decoupling performance of the RTAX line of FPGAs. The data has been used to improve the Power Integrity models and VDD Droop/Ground Bounce prediction, as well as other key performance parameters. AEi Power Integrity

New SPICE Models for SPACE Parts - Linear Technology Regulators and Switchers, High Fidelity Opamp models and many new Semiconductor models. AEi Library and LT Models

New Advanced Testing Techniques - Along with our EOL SPICE models and ability to predict EOL phase and gain margin, AEi Systems has developed new techniques to test the BOL Stability performance of linear regulators, opamps and switchers that do not support Bode Plots (as in no control loop access or multiple loops).

 

Need Analysis Support?
Papers You Might Have Missed
Lessons Learned from SPICE

Space Power Workshop Presen- tation, May 8, 2014. Accurate analysis relies to a large degree on accurate SPICE models and modeling capabilities. This pres- entation highlights many of the issues surrounding IC vendor and EDA software vendor supplied SPICE models. Several examples of poor vendor supplied models and modeling pitfalls are included.

Three Stability Assessment Methods Every Engineer Should Know About

Many engineers are familiar with the Bode plot as an effective stability assessment method. However, some authors suggest and even teach that the Bode plot is the only method needed. This article shows why this thinking is short-sighted. A single, low cost instrument that can produce Bode plots, as well as two other stability assessment methods is discussed providing a more comprehensive stability assessment set of guidelines.

Improve Performance And Reduce Cost

By carefully matching the VRM, PCB planes, and load circuits to each other and to the required impedance magnitude, a flat PDN impedance can be created while minimizing circuit board area. The optimization also minimizes the use of expensive low-ESR capacitors and low-impedance voltage regulators.
Cheaper than in-house resources
  • Our full-time team of top engineers with focused backgrounds in reliability, design, WCCA, and test has all the required core competencies to perform with great efficiency.
  • We have a significant number of SPICE models already made. We have Parts Variability Databases. We have Radiation Data. Even if you have in-house resources, dealing with models and tolerances can take a significant amount of time. AEi Systems puts the money and time savings in your pocket as we do not charge extra for this valuable IP
  • Analysis is all we do; Keep your in-house designers doing what they do best.

Faster than in-house resources - ready to go

  • Our proprietary software tools, library of proven SPICE models, and our 20 years of analytical engineering experience keep your team ahead of schedule
  • No bias - We introduce "checks and balances" to your design process/SDRLs

How can we help you? Contact us for more specific information or a no-obligation quotation.